Multi-functional unit processing offers well known parallel processing advantages. Unfortunately, the increased power dissipation imposed on the single substrate and package is a serious limitation. Generally, in CMOS VLSI circuits, most of the power dissipated is a result of the energy required to charge and discharge the load and internal capacitances on any internal and external circuits. Excessive temperatures at semiconductor device junctions can cause device and/or circuit malfunctions/failures, reduce circuit performance, and cause circuit interconnect and/or package failure. Increases in temperature tend to increase a signal's propagation delay through a circuit. Changes in propagation delays can cause undesired transients and/or synchronization problems in the case of critical timing paths in CMOS and similar circuits.
One approach to reducing the power dissipation of a circuit is to reduce the voltage swing at its outputs. CMOS and similar circuits will function correctly over a significant range of supply voltage. Reducing the voltage, however, also tends to increase a signal's propagation delay and may cause synchronization and reliability problems. For example, a digital chip is typically characterized by a critical timing path. Reducing the supply voltage will cause the propagation of a signal through the critical timing path to slow until a malfunction occurs.
Another approach to controlling power dissipation uses temperature feedback to control the clock frequency of a circuit. The frequency-based approach reduces the power dissipated by the clock circuit itself and for a synchronous circuit during the fraction of cycles that the circuit's inputs are addressed.
The particular thermal feedback mechanisms used in the prior art vary. The temperature feedback mechanism could be on-chip or mounted in close proximity to a potentially hot chip, usually by means of a thermocouple on the package or case.
Another frequency-based approach does not use direct temperature feedback. Instead, a piecewise estimate of temperature change is determined as a function of time and clock frequency including temperature limits. A measured operating frequency and elapsed time is correlated to the piecewise estimate and the operating frequency is throttled between the temperature limits.
Regardless of the particular feedback mechanism used, one concern that arises in any frequency-based approach is that varying the clock frequencies to different portions of a chip may cause synchronization problems. In addition, the frequency-based approach is optimal only for the subset of clock cycles when a given circuit's inputs are addressed.
Thus, there is need for an improved thermal feedback system and method for controlling the power dissipation of a synchronous circuit while maintaining synchronization and reliability. The present invention addresses such a need.